Shared by:linqee
by Pong P. Chu (Author) "Developing and producing a digital system is a complicated process and involves many tasks..."
The skills and guidance needed to master RTL hardware design
This book teaches readers how to systematically design efficient, portable, and scalable Register Transfer Level (RTL) digital circuits using the VHDL hardware description language and synthesis software. Focusing on the module-level design, which is composed of functional units, routing circuit, and storage, the book illustrates the relationship between the VHDL constructs and the underlying hardware components, and shows how to develop codes that faithfully reflect the module-level design and can be synthesized into efficient gate-level implementation.
Several unique features distinguish the book:
* Coding style that shows a clear relationship between VHDL constructs and hardware components
* Conceptual diagrams that illustrate the realization of VHDL codes
* Emphasis on the code reuse
* Practical examples that demonstrate and reinforce design concepts, procedures, and techniques
* Two chapters on realizing sequential algorithms in hardware
* Two chapters on scalable and parameterized designs and coding
* One chapter covering the synchronization and interface between multiple clock domains
Although the focus of the book is RTL synthesis, it also examines the synthesis task from the perspective of the overall development process. Readers learn good design practices and guidelines to ensure that an RTL design can accommodate future simulation, verification, and testing needs, and can be easily incorporated into a larger system or reused. Discussion is independent of technology and can be applied to both ASIC and FPGA devices.
With a balanced presentation of fundamentals and practical examples, this is an excellent textbook for upper-level undergraduate or graduate courses in advanced digital logic. Engineers who need to make effective use of today's synthesis software and FPGA devices should also refer to this book.
694 pages
Publisher: Wiley-IEEE Press (April 14, 2006)
Language: English
ISBN-10: 0471720925
ISBN-13: 978-0471720928
| Announce URL: | http://inferno.demonoid.com:3390/announce |
| Info Hash: | ceb1292f57b03841aecbdcd9b4833dc772728e3d |
| Creation Date: | Wed, 21 Jun 2006 17:45:57 +0800 |
| This is a Multifile Torrent | |
| BBL.nfo 6.64 KBs | |
| Torrent downloaded from Demonoid.com.txt 47 Bytes | |
| Wiley.IEEE.Press.RTL.Hardware.Design.Using.VHDL.Apr.2006.pdf 34.11 MBs | |
| file_id.diz 796 Bytes | |
| www.ebookshare.net.url 128 Bytes | |
| Combined File Size: | 34.11 MBs |
| Piece Size: | 128 KBs |
| Comment: | http://www.ebookshare.net |
| Torrent Encoding: | GBK |
| Seeds: | 8 |
| Peers: | 0 |
| Completed Downloads: | 13537 |
| Torrent Download: | Torrent Free Downloads |
| Tips: | Sometimes the torrent health info isn't accurate, so you can download the file and check it out or try the following downloads. |
| Direct Download: | Download Files Now |
| Tips: | You could try out the alternative bittorrent clients. |
| Secured Download: | Start Anonymous Download |
| Ads: |
|
June 10th, 2009 at 12:46 pm
download
June 10th, 2009 at 12:47 pm
dqw